1. Field of the Invention
The present invention relates to a low voltage operation method of a plasma display panel and an apparatus thereof, and in particular to a low voltage operation method of a plasma display panel and an apparatus thereof which are capable of reducing a voltage supplied to an address by decreasing wall electric charge inside a cell in address discharge by applying a direct-current biasing voltage.
2. Description of the Prior Art
In a PDP (Plasma Display Panel), inside a discharge cell separated from bulkheads, red/green/blue colors fluorescent materials formed at the bulkheads are excited by ultraviolet rays generated in discharge of inert mixture of gas such as Hexe2x80x94Ne or Nexe2x80x94Xe, a character or a graphic is displayed by visible rays generated when the state of the fluorescent materials is changed from the excitation state to a ground state.
Because the PDP does not require an electron gun such as a cathode ray in order to display an image, it is thinner and lighter than a cathode ray tube and is favorable to high distinct and scale-up.
In addition, because the PDP includes electrodes, a dielectric layer, and discharge gas, etc. and is operated by charge and discharge, it has a function as a capacitor charging electric charge. Accordingly, the PDP consumes lots of energy in charging/discharging, the more the size of PDP increases, the more energy consumption of the PDP increases.
Accordingly, in order to consume energy more efficiently, three electrode AC surface discharge type PDP is used. In the three electrode AC surface discharge type PDP, because wall electric charge is accumulated at a surface, electrodes are prevented from sputtering occurred by discharge, therefore the three electrode AC surface discharge type PDP is favorable to a low voltage operation and having a long life span.
FIG. 1 is a perspective view illustrating a structure of the conventional surface discharge type PDP, and FIG. 2 is a sectional view illustrating a cell of the PDP as shown at FIG. 1. Herein, the conventional surface discharge type PDP includes an upper substrate 10, a scan electrode 20Y and a sustain electrode 20Z formed at the bottom surface of the upper substrate 10, an upper dielectric layer 30 accumulating wall electric charge generated in discharge of the PDP, a protecting layer 30 preventing the upper dielectric layer 30 from sputtering occurred in discharge of the PDP and heightening the discharge effect of secondary electron, a lower substrate 90, an address electrode 80X formed at the upper surface of the lower substrate 90, a lower dielectric layer 70 accumulating electric charge of the address electrodes 80X, a bulkhead 50 formed at the lower dielectric layer 70, and a fluorescent material 60 coated onto the bulkhead 50 and the lower dielectric layer 70.
The scan electrode 20Y and the sustain electrode 20Z respectively include transparent electrodes 22Y, 22Z and metal bus electrodes 21Y, 21Z. The metal bus electrodes 21Y, 21Z have a smaller line width than the transparent electrodes 22Y, 22Z, are formed at the edge of the transparent electrodes 22Y, 22Z and reduce voltage drop due to high resistance of the transparent electrodes 22Y, 22Z.
The upper dielectric layer 30 and the protecting later 40 are laminated onto the upper substrate 10 in which the scan electrode 20Y and the sustain electrode 20Z are formed. The upper dielectric layer 30 accumulates the wall electric charge generated in discharge of the PDP, the protecting layer 40 prevents the upper dielectric layer 30 from sputtering occurred in discharge of the PDP and improves the discharge efficiency of the secondary electron.
The lower dielectric layer 70 and the bulkhead 50 are laminated onto the lower substrate 90, and the fluorescent material 60 is coated onto the surface of the lower dielectric layer 70 and the bulkhead 50.
The address electrodes 80X formed at the lower substrate 90 are placed so as to be crossed with the scan electrode 20Y and the sustain electrode 20Z, and the bulkhead 50 is placed so as to be crossed with the address electrodes 80X in order to prevent ultraviolet and visible rays generated in discharge from leaking into an adjacent discharge cell.
Because the fluorescent material 60 is excited by ultraviolet rays generated in discharge of the PDP, one visible ray of red/green/blue is generated and inert mixture of gas such as Hexe2x80x94Ne or Hexe2x80x94Xe for discharge is injected into a discharge space of the discharge cell formed between the upper/lower substrates 10, 90 and the bulkhead 50.
The above-described three electrode AC surface discharge type PDP operates one frame by dividing it into several sub-fields having different luminous times in order to obtain gray level of a picture.
Each of the sub-fields is divided into a reset period for occurring discharge regularly, an address period for selecting a discharge cell and a sustain period for obtaining a gray level according to the discharge times.
For example, in order to display a picture with 256 gray level, a frame period (16.67 ms) corresponded to {fraction (1/60)} second is divided into eight sub-fields (SF1xcx9cSF8), the eight sub-fields (SF1xcx9cSF8) are divided into a reset period, an address period and a sustain period. The reset period and the address period of each sub-field are same, however the sustain period increases as a rate of 2n (n=0, 1, 2, 3, 4, 5, 6, 7). Because the sustain period is different in each sub-field, the gray level of the picture can be obtained.
In the above-described sub-field, an operation waveform supplied to the three electrode AC surface discharge type PDP will be described with reference to accompanying FIGS. 3A-3C.
FIGS. 3A-3C are waveform diagrams illustrating an operation waveform supplied to the three-way AC surface discharge type PDP in a sub-field according to the conventional art, the PDP operates one sub-field by dividing it into the reset period, the address period and the sustain period.
In the reset period, an ascending ramp waveform (ramp 1) and a descending ramp waveform (ramp 2) are supplied consecutively.
When the ascending ramp waveform (ramp 1) is supplied, weak discharge occurs between the scan electrode 20Y and the sustain electrode 20Z, and wall electric charge is accumulated at the upper dielectric layer 30. When the descending ramp waveform (ramp 2) is supplied, an operational margin of an operation circuit can be obtained sufficiently by removing the wall electric charge inside the cell appropriately.
By supplying the ramp waveform to the scan electrode 20Y for the reset period, a contrast ratio is increased by decreasing visible rays as many as possible for the reset period as a non-display period, and an operation voltage required for the address discharge is lowered by forming the wall electric charge at the whole panel uniformly.
For the address period, an electrode negative data pulse is supplied to the address electrode 80X, and an electrode positive scan pulse is sequentially supplied to the scan electrode 20Y in order to synchronize with the data pulse. The cell supplied the data pulse is address-discharged by being added the voltage corresponded to the voltage difference between the data pulse and the scan pulse and the internal wall voltage accumulated by the wall electric charge inside the cell.
For the sustain period, a sustain pulse is supplied to the scan electrode 20Y and the sustain electrode 20Z by turns, cells selected by the address discharge performs a sustain discharge whenever the sustain pulse is supplied. After all the sustain discharge according to a luminance relative ratio occurs, an erase signal having a chopping wave shape is supplied to the sustain electrode 20Z.
As described above, by discharging the wall electric charge inside the cell for the reset period, the voltage required for the address discharge is lowered.
However, in order to perform the address discharge, because a voltage not less than 60W is required, power for operating the PDP is consumed a lot. And, because parts suitable for the high voltage operation are expensive, a fabrication cost is increased.
In addition, because the number of wall electric charges is decreases in the high voltage, operation efficiency of the PDP is lowered.
It is an object of the present invention to provide a low voltage operation method of a plasma display panel and an apparatus thereof which are capable of lowering a voltage supplied from outside as an optimum level in address discharge by applying a DC biasing voltage to a PDP (Plasma Display Panel).
In order to achieve the above-mentioned object, a low voltage operation method of a plasma display panel in accordance with the present invention includes operating one frame by dividing it into several sub-fields in order to obtain a gray level of a PDP, dividing the sub-field into a reset period, an address period, a sustain period and supplying a ramp waveform in the reset period, and applying a DC biasing voltage in order to reduce wall electric charge discharged in descending of the ramp waveform.
In order to achieve the above-mentioned object, a low voltage operation apparatus of a plasma display panel in accordance with the present invention includes a plasma display panel, a maintenance operation unit being supplied a sustain voltage, a biasing voltage supplying unit supplying a DC biasing voltage, a first switch controlling a voltage applied from the biasing voltage supplying unit, a second switch controlling the operation of a reset voltage, a third switch controlling a voltage supplied from the first switch and the second switch, a fourth switch controlling supply of a scan voltage, and an operation intergrated circuit connected to a scan electrode.